Power supply system for electric discharge machines

ABSTRACT

A power supply for an electroerosion machine having a switching element which controls the machining current in the gap. The value of the current is compared with a predetermined voltage and the signal generated based on this comparation is provided to a logic gate, advantageously an &#34;AND&#34; gate, whose output signal is applied to the control electrode of the switching element. Electrode consumption is reduced by using a generally step-type current waveform signal. Machining current during the discharge period may also be controlled to more closely approximate a square wave so that shifting to a faster machining rate can be easily accomplished by accepting some sacrifice in electrode consuption. Preferably, two or more switching and gating devices are used to permit gap current to flow intermittently during the entire discharge period.

FIELD OF THE INVENTION AND BACKGROUND OF THE INVENTION

This application is a continuation of application Ser. No. 08/156,067filed Nov. 23, 1993 now U.S. Pat. No. 5,386,095, which was in turn adivisional of application Ser. No. 07/818,536 filed Jan. 9, 1992, nowU.S. Pat. No. 5,298,709, which in turn was a divisional of applicationSer. No. 07/429,794 filed Oct. 31, 1989 now U.S. Pat. No. 5,126,525.

The present invention relates to a power supply system for electricdischarge machining ("EDM") or other electroerosion machining equipment,and more particularly to an EDM power supply having an improved responseto short-circuit conditions at the machining gap.

In conventional EDM equipment, a current limiting resistance ispositioned in series with the gap to prevent excess current through thegap. However, when the gap experiences a short-circuit condition, acurrent which is greater than the normal machining current passesthrough the gap, usually causing an arcing condition.

In order to prevent arcing, a chopper circuit, i.e. a circuit in whichcurrent is intermittently passed through the gap during a singledischarge period to lower the average power, has been used. An exampleof such a conventional chopper circuit is shown in FIG. 1. FIGS. 2(B)through 2(D), are timing charts which illustrate the gap voltage andcurrent behavior in the circuit of FIG. 1 in response to the gate signalof FIG. 2(A). In FIG. 1, a current sensing resistance 251, a coil 252, aswitching transistor 253 and the machining gap 240, are connected inseries with a power supply 250. A current sensor 254 detects the currentpassing through the gap 240 via the current sensing resistance 251 andoutputs a gate 1 signal which, when it is high, i.e., a digital 1,switches the transistor 253 to an ON position. The time during which thesignal from the sensor 254 is high, determines the so-called ON periodof the machining pulse or the period during which machining power isapplied to the gap.

In the chopper circuit of FIG. 1, a coil 252 is used in order to producea smooth machining current. However, the coil 252 acts to delay thestart of discharge current flow through the gap; thus the integratedvalue of the discharge current through the gap is reduced and the EDMmachining rate is reduced. As is known to one of skill in the art, asthe discharge current pulse width is shortened, the machining rate isreduced. The gap current, for large and small values of coil 252inductance (L), is illustrated in FIGS. 2(C) and 2(D), respectively.

As shown in Japanese Patent No. 62-27928, a signal having a considerablyhigher frequency than that of the gate signal (as shown in FIG. 2(A),the gate signal is a signal which stays high or at an ON-position duringa period corresponding to the time during which voltage is applied tothe machining gap) is supplied to a switching transistor, such as thetransistor 253 in FIG. 1. When the current waveform is smoothed by aninductance section, such as the inductance 252 of FIG. 1, a relativelyconstant current is supplied to the gap. This generally constant currenttype of circuit is well known and, since the difference between theshort-circuit current and a machining current is small, can usuallyprevent the induction of a short-circuit arc. If the power supplyvoltage is low, based on the time constant established by the currentsensing resistance 251 and the inductance of the coil 252, steep currentincreases are prevented, thus resulting in the above-noted problem inthat the machining rate is reduced.

In the example disclosed in Japanese Patent No. 62-27928, the magnitudeof each of the currents in the discharge current waveform is depresseddue to the effect of circuit inductance. In particular, when the peakmachining current is 10 amperes or less, the machining rate becomesextremely low.

In order to reduce the energy required, attempts have been made to passthe machining current through the machining gap while the voltage levelis reduced. Thus, the no-load voltage is reduced, and the machiningwaiting time, [τW], is extended. The waiting time is the time betweenthe instant when voltage is applied to the machining gap and the timewhen a discharge current starts to flow. It is best illustrated in theleft-hand part of the gap voltage depiction in FIG. 2(B). As a result oflonger waiting times, the machining rate is reduced.

In EDMs which use water as a dielectric, an electrolytic current passesthrough the gap during the waiting time so that the gap voltage isreduced, sometimes causing a problem in that discharge does not occur.

Further, it is conventionally recognized that when selecting machiningconditions for EDMing, the machining rate is reduced when electrodeconsumption is limited, but that generally electrode consumption is highwhen the machining rate is high. Therefore, the user must decide whetherto emphasize electrode consumption or the machining rate in settingmachining conditions. In the above-mentioned prior art example, there isa problem in that the discharge conditions for achieving minimalelectrode consumption and high machining rate cannot be achieved.

In conventional systems, the generation of a step-like machining currentwaveform required use of a large number of transistors to pass thecurrent. The entire system became large and complicated.

Further, as shown in FIG. 2(D), when a short-circuit condition exists atthe gap, in conventional power supplies the waveform of the dischargecurrent takes on an exaggerated zigzag shape, resulting in unexpectedmachining processes. For example, electrode consumption becomesextremely high, and the working rate is extremely low.

OBJECTS AND SUMMARY OF THE INVENTION

An object of the present invention is to provide a power supply for EDMequipment in which the machining current provided to the machining gapis improved and in which the induction of an arc during gapshort-circuit condition is prevented and which, despite a lower gapvoltage during abnormal gap conditions, maintains a relatively highmachining rate. It is another object of the present invention toconserve energy while providing a power supply capable of increasedmachining rates.

Another object of the present invention is to provide am EDM powersupply which, when used with a water-based machining fluid, causes anelectrolytic current to be shifted in order to ensure dischargemachining.

Another object of this invention is to provide a power supply fordie-sinking or hole drilling EDMs which exhibits minimal electrodeconsumption.

It is also an object of the present invention to create a step-likemachining current waveform in which the machining current is easilydivided into several steps.

It is a further object of the present invention to minimize or eliminatethe inductive component of the conventional prior art chopper circuit.

It is yet a further object of the present invention is provide a systemfor supplying discharge current for EDM equipment in which stablemachining is performed without reducing the machining rate.

These as well as other objects and advantages are achieved in thepresent invention by providing a switching element which controls thedischarge current in the gap. The value of the discharge current iscompared with a reference voltage. The signal based on this comparativeresult is provided to a logic gate, advantageously an "AND" gate, whoseoutput signal is applied to the control electrode of a switchingelement. Therefore, not only is induction of an arc during short circuitof the gap prevented, but the total current through the gap is increasedeven though the gap voltage is low. As a result, the reduction inmachining rate experienced with the conventional chopper circuit isavoided.

In another aspect of the present invention, electrode consumption isreduced and the machining rate is increased by increasing the duty ratioin a section of a step-type current waveform signal having a relativelylarger magnitude. In addition, with the present invention, the dischargecurrent waveform during the discharge period may be controlled to moreclosely approximate a square wave discharge current so that shifting toa faster machining rate can be easily accomplished by accepting somesacrifice in electrode consumption rate.

In another aspect of the present invention, a device is described forenuring stable machining without suffering a loss in machining rate.Preferably, two or more switching and gating devices are used to permitgap current to flow intermittently during the entire discharge period.

Additional objects, advantages and novel features of the invention willbe set forth in the description which follows and in part will becomeapparent to those skilled in the art upon examination of thisdisclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are incorporated in and form a part ofthis specification, illustrate various embodiments of the presentinvention and, together with the description, serve to explain theprinciples of the invention:

FIG. 1 is a schematic drawing of a prior art chopper circuit.

FIG. 2(A) through 2(D) represents various voltage and current waveformsfor the circuit of FIG. 1 under varying conditions.

FIG. 3 is a schematic circuit diagram of a first embodiment of theinvention.

FIGS. 4(A) through 4(C) represents gate voltage and current waveforms asa function of time during operation of the circuit of FIG. 3.

FIG. 5 is a schematic circuit diagram of another embodiment of theinvention.

FIG. 6 is a schematic circuit diagram of a circuit illustrating anotherembodiment of the invention.

FIG. 7 is a schematic circuit diagram illustrating still anotherembodiment of the present invention.

FIG. 8 is a schematic circuit diagram illustrating yet anotherembodiment of the invention.

FIG. 9 is a schematic diagram illustrating a current waveform controllerfor the circuit of FIG. 8.

FIGS. 10(A) through 10(I) comprise a timing chart illustrating theoperation of the current controller of FIG. 8.

FIGS. 11(A) through 11(F) comprise a timing chart illustrating theoperation of the circuit of FIG. 8.

FIGS. 12(A) through 12(I) comprise a timing chart illustrating one modeof operation of the current controller of FIG. 9.

FIGS. 13(A) through 13(F) comprise a timing chart illustrating anothermode of operation of the current controller of FIG. 9.

FIG. 14 is a schematic circuit diagram of another embodiment of theinvention.

FIG. 15 is a schematic circuit diagram illustrating an example of acurrent controller for the circuit of FIG. 14.

FIGS. 16(A) through 16(E) comprise a timing chart illustrating theoperation of the circuit of FIG. 14.

FIG. 17 is a schematic circuit diagram illustrating a variation of thecircuit of FIG. 5.

FIGS. 18(A) through 18(D) comprise a timing chart illustrating theoperation of the circuit of FIG. 17.

FIG. 19 is a schematic diagram of another variation of the circuit ofFIG. 5.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made in detail to the presently preferredembodiments of the invention, examples of which are illustrated in theaccompanying drawings. In the various figures, parts which performsimilar functions are identified by similar reference numerals.

Turning first to the example of FIG. 3, there is illustrated a powersource V1, a diode D1, a switching transistor TR1, a resistance forcurrent detection R1, and a machining gap G, all connected in series.The machining gap G is formed between a tool electrode, E, and a workpiece, WP,.

A comparator C1 compares the voltage across the resistor R1 with areference voltage source VR1 and outputs a high or "1" signal when thecurrent through the resistor R1 creates a voltage drop below that of thereference voltage VR1. An AND gate A1 takes the output signal from thecomparator C1, and a gate signal (a signal which is ON, i.e. at alogical high level, during a period corresponding to the time duringwhich power should be applied to the gap G) and produces an AND signalwhich drives the gate of switching transistor TR1.

The operation of the circuit of FIG. 3 will now be explained withreference to FIGS. 4(A) through 4(C). FIG. 4(A) illustrates the gatesignal which, as alluded to above, is a signal having a high value or avalue corresponding to a digital "1" during the time in which voltageshould be applied to the gap G. This gate signal is input to one of theinputs of the AND gate A1 of FIG. 3. When the transistor TR1 is switchedoff, no current is passed through the resistor R1, so that no voltagedrop occurs across it. As a result, the comparator C1 outputs a "1"signal. On receiving that output from the comparator, the transistor TR1is turned on. However, at the instant when the transistor turns on, theamount of current through the resistor R1 is low, so that the voltagedrop across R1 is also low. Thus, the output of the comparator C1 staysat "1".

After the transistor TR1 is turned on and the gap current increases, thevoltage drop across the resistor R1 eventually exceeds the voltage ofthe reference voltage source VR1, and the output of the comparator C1goes low, i.e. to a logical "0". Thereupon, the AND gate A1 outputs alogical "0" signal so that the transistor TR1 is turned off. In otherwords, the transistor TR1 only maintains an ON-state for a very shorttime after it is turned on.

As described above, when the transistor TR1 is turned off current flowthrough the gap current stops and the voltage drop across the resistorR1 goes low, so that the comparator C1 again outputs a "1" signal.Thereupon the AND gate A1 also outputs a "1" signal turning thetransistor TR1 ON again. As the abovementioned operation is repeated,the AND gate intermittently generates a series of pulses having anextremely narrow pulse width compared to the pulse width of the gatesignal and sends them to the base of the transistor TR1.

If the time constant for the current path for turning transistor TR1 onis adjusted to be very low (for example, if the inductance previouslyused is removed or minimized), the standing current waveform in the gapG is tremendously improved and the period from the OFF state of thetransistor TR1 to its next ON state is shortened so that interruption inthe discharge current can be either almost eliminated or minimized.

In FIG. 4(B), gap voltage waveforms for a normal discharge, open circuitand short circuit are illustrated. In FIG. 4(C) corresponding gapcurrent waveforms for each of those gap conditions are illustrated.

In the above-mentioned example, a generally constant current circuit isformed so that in spite of the occurrence of a short circuit in the gapG, as illustrated in the right hand side of FIG. 4(B) and 4(C), thedifference between the short current and the normal discharge current,as illustrated on the left-hand side of FIG. 4(C), is extremely small,and the induction of an arc discharge is prevented. In addition, in theabove-mentioned example, since the time constant of the gap circuit canbe set to be low and because the output of the comparator C1 is directlyapplied to the AND gate A1, the response time of the entire circuit isexcellent and unnecessary interruptions of the discharge current areprevented.

In the embodiment of FIG. 5 another power source, V0, which has a highervoltage than the voltage of the power source V1, and whose currentcapacity is lower than that of V1, is used. The voltage source V1 inFIG. 5 corresponds to the power source V1 of FIG. 3. A switchingtransistor TR0, driven by the gate signal, controls the timing of theapplication of the power source V0 to the gap G.

In the circuit of FIG. 5, the voltage during the waiting time [τW], seeFIG. 4(B), can be increased and the performance of each discharge can beensured. This embodiment is particularly effective when the impedance ofthe gap is reduced, as in the case of a discharge machining in awater-based machining fluid.

In the embodiment of FIG. 6, a first circuit comprising a diode D1, atransistor TR1, resistance for current detection R1, a comparator C1, areference voltage source VR1 and an AND gate A1 are used in a mannersimilar to that described above with reference to FIG. 3. Anothercircuit comprising a diode D2, a transistor TR2, a resistance forcurrent detection R2, a comparator C2, a reference voltage source VR2and an AND gate A2, which correspond in structure and function to thecorresponding parts of the first circuit, are connected in parallel withthe first circuit. The resistance value of resistor R2 can be the sameor different from that of the resistor R1. The voltage level of thereference voltage source VR2 can be the same or different from that ofthe reference voltage source VR1.

In FIG. 6, the current path for supplying the voltage from the powersource V1 to the gap G is divided into two loops, and the impedance ofthe total discharge current path is the synthesized resistance of R1 andR2. Since these are parallel paths, the discharge current can beincreased. If the switching timing is shifted (by changing the values ofresistances R1 and R2, or by changing the voltages of reference voltagesources VR1 and VR2) ripples in the discharge current waveform can becontrolled and minimized.

For example, if in the example of FIG. 6, any particular dischargecurrent peak is high, a reduction in that peak can be made by changingone of the resistors R1 or R2, or by increasing one of VR1 or VR2 inorder to improve the current waveform to more nearly approximate asquare or rectangular wave so that the machining rate is improved, thusconserving energy.

As alluded to above, in the embodiment of FIG. 6, two discharge currentloops are connected in parallel. As will be apparent to the artisan,three or more discharge current loops can also be connected in parallel.In other words, plural discharge current loops, each consisting of aswitching device, a discharge current detecting device, a comparatordevice, and a gating device, or equivalent structures, can be connectedin parallel. In this manner, current ripples can be minimized.

In the EDM systems which use water-based machining fluids, anelectrolytic current may pass through the gap during the waiting time[τW]. As a result, the gap voltage is reduced and no discharge occurs.In the circuit of FIGS. 5 and 6, a voltage from the voltage source V0 isapplied across the gap during the waiting period, i.e., no-loadcondition. This will ensure that, despite the tendency of theelectrolytic current to lower the gap voltage, the gap will break downso that any electrolytic current flowing during the waiting period willcontinue during the subsequent discharging process and, as a result,high-speed machining can be realized.

In the embodiment of FIG. 7, a resistor, R0, for current detection isconnected in series with a transistor TR0 and a voltage source VR0, acomparator C0, and an AND gate A0. A type of oscillator comprising theresistor R0, the comparator C0, the AND gate A0, and the transistor TRis formed by this loop. In other words, as explained above, thetransistor TR0 is caused to shuttle between its ON and OFF states. Thiscontrols the gap current during the waiting time to prevent excess gapcurrent. The two current loops which include voltage source V1 aresimilar to the corresponding current loops of FIG. 6.

As will be appreciated by the artisan, in the abovementioned examples, aSchmidtt trigger can be substituted for the comparators C1, C2 and C0.

According to the examples of FIGS. 3, 5, 6 and 7, the induction of anarc when the gap experiences a short circuit condition can be preventedand, in addition, the current waveforms in the gap can be controlled tomore closely approximate an ideal discharge current, i.e., steep riseand absence of peaks indicative of short circuit, in spite of a lowergap voltage as compared to the prior art EDMs which use water-machiningbased machining fluids. As a result, the reduction in the rateexperienced with the conventional EDMs can be prevented.

In the embodiment of FIG. 8, a current waveform controller 10 isconnected to provide a digital input to a D/A converter 20. The D/Aconvertor 20 is a circuit in which digital signals are converted toanalog signals. The analog output of D/A convertor 20 is connected tocomparators 31 and 33. An AND gate 32 has as inputs the output of thecomparator 31 and the gate signal. The output of the AND gate 32 drivesthe transistor 40. The gate signal is also input to an inverter 34,whose output is connected to the set input of flip-flop 35. The resetinput of flip-flop 35 is controlled by comparator 33. The machiningpower circuit includes a resistor for current detection 41, a gap 50 anda voltage source 60, all connected in series.

Preferably, the current waveform controller 10 includes three inputs:one for initial IP data, one for final IP data, and one for startingtime control data. These inputs are generated by a CPU 70. Thecontroller 10, together with the D/A convertor 20, outputs a step-typewaveform signals as shown in FIG. 10(I).

The comparator 31, gate 32 switching transistor 40 and the currentdetecting resistor 41 form a type of oscillator to realize a choppercircuit with the reference voltage to the comparator 31 being the outputof the D/A converter 20, i.e., a value which varies according to theanalog output voltage of D/A 20. As will be appreciated by the artisanon review of the above, in this embodiment and in the embodimentsdiscussed above, power can be intermittently supplied to the gap usingany circuit which provides appropriate intermittent power. Thecomparator 33 detects discharge timing by comparing the signals from thecurrent detecting resistor 41, with a reference voltage VR. Theflip-flop 35 detects the discharge timing along with the comparator 33and its output is used to control the current waveform controller 10.

As in the embodiments described above, the transistor 40 is a switchingdevice for controlling the discharge current to the gap and repeatedlyshuttles between its ON and OFF states during a single discharge periodas defined by the gate signal. The transistor 40 may be advantageouslyoperated to increase the duty ratio between the portion of the currentwaveform of FIG. 10(I) having the larger magnitude from that having thesmaller magnitude.

The voltage drop across the resistor 41 is applied as an input to thecomparator 31. A resistance, condenser and diode, collectivelyidentified by the reference numeral S, are connected in parallel to thetransistor 40 to form a circuit for surge absorption.

The CPU 70, which forms no part of the present invention, outputs datato the current controller 10 to control the discharge current waveformsso that during each discharge period the discharge current waveform hasa generally square, rectangular or step type waveform. Equivalentinformation can be input directly by the operator or calculated andinput by means other than a CPU.

As illustrated in FIG. 9, the current controller 10 of FIG. 8 preferablyincludes a counter 11, a comparator 12, a clock generating circuit 13, afrequency dividing circuit 14, an AND circuit 15, and inverters 16 and17.

The counter 11 reads the initial IP data from the CPU 70 when the Qoutputs of the flip-flop 35 are set. Then, after the Q output of theflip-flop 35 is reset, i.e., goes low, the counter 11 starts to countclock pulses. The time during which the output of the flip-flop 35 islow corresponds to the discharge period.

The comparator 12 compares the outputs of the counter 11 with the finalIP data from the CPU 70. When the outputs of the counter 11 are equal tothe final IP data set in the comparator 12, a digital signal is fed backto the counter 11 from the A=B output of the comparator 12 via aninverter 17 and an AND circuit 15.

A frequency dividing circuit 14 controls the frequency dividing ratioaccording to a start time control signal (START TIME) from the CPU 70.The AND circuit 15 supplies a clock STCK signal (FIG. 10(H)) forcounting up the counter 11 whenever there is no agreement in thecomparator 12 between the final IP data and the Q outputs of the counter11 during the discharge period, i.e., when the Q outputs of theflip-flop 35 are at a logical low or "0" level. The counter will thencount clock signals of a frequency determined by the frequency divider14.

The operation of the circuit of FIGS. 8 and 9 will now be explained byreference to FIGS 10(A) through 10(I).

Preferably, the CPU 70 supplies the gate signal. It may, of course, besupplied from a printed circuit board or by other conventional means.When the gate signal is at a logical "0", i.e., L, no discharge isgenerated because the AND gate 32 outputs an L signal, thereby turningoff the transistor 40. Consequently, no voltage is impressed across thegap 50. At that time, since no current flows through resistor 41, thecomparator 31 outputs an H signal.

When the gate signal goes high, i.e., to H (assuming initial low currentin resistor R41), the AND circuit 32 outputs an H signal and thetransistor 40 is turned ON, thereby impressing the voltage of thevoltage source 60 across the gap 50. Initially, there is no dischargeacross the gap and no current flows through the resistor 41. At thattime, comparators 31 and 33 generate H signals, thereby setting theflip-flop 35.

At the time t1, as shown in FIG. 10, i.e., the instant when dischargebegins, current begins to flow through the resistor 41. The voltage dropthereacross causes the comparator 33 to output an L signal, therebyresetting the flip-flop 35.

For example, assume a "1" is set as the initial IP data and a "3" is setas the final IP data in the current controller of FIG. 9. Then theinitial IP data "1" is loaded in the counter 11 when the Q output of theflip-flop 35 is at H (when set). At this setting, only the output QA ofthe counter 11 is M, while the other outputs, QB, QC and QF, are at L.Only when QA is at H and QB, QC and QF are at L will the output signalof the D/A converter circuit 20 become a "1".

At time t2, the next STCK pulse from the frequency circuit 14 arrives atthe counter 11 through the AND circuit 15. As this pulse represents anup count of one, it will cause the QB output of the counter 11 to gohigh and output an H. This causes the D/A converter 20 to output a "2".Since the output of the counter 11, i.e., a "2", does not equal thesetting of the comparator "2" no A=B signal is generated and, as long asthe FF 35 output Q remains low, the gate 15 will continue to pass clockpulses from the frequency divider 14. When the next STCK arrives, thecounter 11, will count up one and will generate H outputs at QA and QB,i.e., a "3".

At this time, when the comparator 12 compares the output of the counter11 with the final IP data, since both agree, an H signal is output fromthe A=B terminal of comparator 12, thereby closing the gate 15. At thistime, the D/A convertor will output a "3" indicative of the count of thecounter 11 which is now equal to the final IP data. Since the clockpulses are now gated off, even if the frequency circuit 14 generatesadditional clock pulses, those signals are prevented from reading theSTCK input of the counter 11. Thus, the D/A circuit 20 will continue togenerate a "3" output until the discharge described above is completed,i.e., until the gate signal (FIG. 10(A)) goes to L.

When the gate signal goes from H to L, the flip-flop 35 is set, and thecounter 11 again loads the initial value of IP data, in this example a"1". Consequently, only when one or more of the outputs of the counter11, for example QA, goes high, i.e., outputs an H during the next gatesignal, will the D/A circuit 20 again output a "1". Thus, as illustratedin FIG. 10(I), the output of the D/A circuit 20 will have a stepfunction wave shape.

However, during the discharge (when the flip-flop 35 is reset), thetransistor 40 shuttles between its ON and OFF conditions. That is, evenduring the counting of timing pulses from the clock 13 and frequencydivider 14, during the interval while the output level of the D/Acircuit is fixed, for example at "1", or "2" or "3", the comparator 31generates H and L signals continuously in the manner described aboveaccording to signals sent from the current detecting resistor 41. Thetransistor 40 is thereby switched ON and OFF repeatedly.

In other words, if little or no current is flowing through the resistor41, the comparator 31 generates an H signal and switches the transistor40 ON, so that current flows through the resistor 41. As the input tothe negative side of the comparator 31 increases beyond a predeterminedvalue established by the output of the D/A convertor 20, the comparator31 generates an L signal, thereby turning the transistor 40 OFF andstopping the flow of electric current through the resistor 41. At thattime, the comparator 31 will again output an H signal, turning thetransistor 40 ON causing current to again flow through the resistor 41.By repeating this action, pulses of a predetermined frequency (and of apredetermined amplitude) are fed to the base of the transistor 40.

As the output of the D/A circuit 20 increases, the duration of output ofthe H signal by the comparator 31 is prolonged (i.e. the duty ratio isincreased); and the ON time of the transistor 40, per unit of time, isincreased. In short, the chopper circuit formed by the transistor 40,and the current detecting resistor 41; together with the currentcontroller 10, the D/A circuit 20 and the gate 32 function as a dutyratio control circuit.

FIGS. 11(A) through 11(F) comprise a timing chart illustrating theoperation of the circuit of FIG. 8 as described above. FIG. 11(D)illustrates the output of the D/A converter 20 of FIG. 8, as a stepwaveform, while FIG. 11(E), illustrates the actual discharge current andhow it increases in accordance with the step function output of D/Aconverter 20. The signal driving base of the transistor TR 40 results inthe characteristically wavy discharge current pattern.

Since the initiation of the discharge current in FIG. 11(E) is steep,the working or machining speed is fast, while the consumption of theelectrode is minimized. Moreover, as will be known by one of skill inthe EDM art, when the initiation of the discharge current waveform issteep, the "biting" of the discharge is good and machining speed isimproved. Moreover, with the present invention the electrode consumptioncharacteristic is as good as in conventional power supplies which do notenjoy the increased machining speed of the present invention.

FIGS. 12(A) through 12(I) and FIGS. 13(A) through 13(F) each comprise atiming chart illustrating the operation of the current wave controllerof FIG. 9 and the circuit of FIG. 8 under different operatingconditions. In FIGS. 12(A) through 12(I) and in FIGS. 13(A) through13(F) examples are illustrated where discharge current of one dischargecycle is made to approximate a square wave by equalizing the values ofthe initial IP date and the final IP data.

In this example, once the counter 11 of FIG. 9, takes the initial IPdata (in this example "3") and as soon as comparator 12, outputs an A=Bsignal (signal of coincidence) the AND gate 15 closes i.e. goes low, thecounter 11 can no longer count up. Consequently, the current controller10 continues to output the same data (the initial IP data and the finalIP data) i.e., a "3").

As shown in FIG. 13(E), when the output of the D/A convertor is "3",i.e., at t1, the gap discharge current increases steeply. In thisexample, if the duration of discharge is relatively short (e.g. 1 to 10micro second), even though electrode consumption is increased, theprocessing speed is accelerated and good finish quality can be obtained.

As will be understood by one of skill in the art on reading thisdisclosure, one may use switching elements other than the transistor 40mentioned above, for example an FET or other switching device can beadvantageously employed. Further, although in the above example, theinput to output frequency ratio "1" is applied to the frequency dividingcircuit 14, other frequency ratio such as 1/2 or 1/4 can be used. Bydoing this, the duration of each step in the current waveform can bealtered to a desired value.

FIG. 14 is the schematic diagram of another embodiment of the invention.In FIG. 14 a discharge circuit comprising a transistor 121, and thepower source 150, are connected in series with the machining gap 140. Asexplained above the transistor 121 is only an example of a switchingdevice for intermittently turning ON during the prescribed period fromthe start of discharge.

Another transistor 122 is connected between the power source 150 and thegap 140. The transistor 122 is connected essentially in parallel to thetransistor 121. The transistor 122, is used as a switching device topermit current to flow through the gap during the time when transistor121 is OFF. Other types of switching devices e.g. an FET can also beadvantageously employed.

In the embodiment of FIG. 14, an electric current controller 110,receives a signal designated as the gate 0 signal from a CPU or otherdevice. As explained above, the gate 0 signal determines the duration ofthe machining pulse ON time. The controller 110 outputs a gate 1 signaland a gate 2 signal. The gate 1 signal is a control signal whichcontrols the transistor 121 to pass current to the gap 140 asappropriate. The gate 2 signal is a control signal which controls thetransistor 122 so as to turn the transistor 122 ON during the gate 1signal OFF period.

The current controller 110 receives a signal from a current-detectingresistor R11, connected in series with the transistor 121. According tothis detection signal, the controller 110 outputs either a gate 1 or agate 2 signal.

FIG. 15 is a schematic circuit diagram illustrating an example of acurrent controller for the circuit of FIG. 14. In the example of FIG. 15current is intermittently passed through the gap 140 through a type ofoscillating circuit formed by the resistor R11, the comparator 111,Schmidt trigger 112 and an gate 113. As will be apparent to the artisanon review of this specification one may devise a circuit other than theabove oscillating circuit to repetitively switch current into the gap140.

As alluded to above, the control 110 includes a comparator 111, aSchmidt trigger circuit 112 connected to the comparator 111, an AND gate113 which receives the output of the Schmidt trigger as one of itsinputs, an invertor 114 connected to the output of the AND gate, aone-shot-multivibrator 115 connected to be triggered by the output ofthe invertor 114, and an amplifier 116 connected to the one-shot 115 toamplify the output thereof. The negative input terminal of thecomparator 111 receives a signal from the resistor R11, while thepositive input terminal receives a reference voltage input.

The one-shot-multivibrator 115 includes a condenser C11, and variableresistor R12, in one timing circuit, and a condenser C12, and variableresistor R13, in another timing circuit. The timing circuit comprisingcondenser C11, and resistor R12, is used to set the time t11 (e.g. 1,500ns) from the going low of the pulse of the gate 1 signal to the goinglow of the pulse of the gate 2 signal as illustrated in FIG. 16. Thetimer circuit comprising the condenser C12, and resistor R13, is used toset the pulse width t12 of the gate 2 signal of FIG. 16.

The operation of the circuit of FIG. 15 will now be explained withreference to FIGS. 16(A) through 16(E).

As shown in FIG. 16(A), when the gate 0 signal in the above example ishigh, voltage is applied across the gap 140, and the gate 1 signalpulses are intermittently generated during the discharge period. After atime interval t11 following the instant the gate 1 signal goes low,i.e., L, the gate 2 signal goes high, i.e., to H. The gate 2 signalremains high while the gate 1 signal is low.

Assuming the gate 0 signal FIG. 16(A) is high, if the transistor 121(FIG. 14) is OFF, no current will flow to the resistor R11 and thenegative input to the comparator 111 becomes smaller than the positiveinput. The comparator 111 thereby generates an H signal. This H signalis, after a slight delay set at the output side of the comparator 111,sent to the AND gate 13 through a Schmidt trigger circuit 112. At thistime the gate 0 signal is high and the AND circuit 113 generates an Hsignal. Consequently, the transistor 121 is turned ON.

When the transistor 121 is turned ON as described above, since a currentflows through the resistor R11, the negative input of the comparator 111becomes higher than the positive input and the comparator outputs a Lsignal. The L signal, slightly delayed by the delay circuit on theoutput side of the comparator 111, is sent to the AND circuit 113through the Schmidt trigger circuit 112 and the AND circuit 113 thereongenerates an L signal. Consequently the transistor is turned OFF.

These operations are repeated during the time the gate 0 signal remainshigh. In other words, while the gate 0 signal is at an H level, the, theSchmidt trigger circuit 112, the AND circuit 113, and the transistor121, constitute a type of the oscillator, and the transistor 121, whichis driven by the gate 1 signal, repeatedly turns ON and OFF. The ON timeand OFF time of the gate 2 signal are determined according to thereference voltage on the positive input terminal of the comparator 111,the fixed time of the set in the RC circuit on the output side of thecomparator 111, and the Schmidt trigger circuit 112. The gate 2 signalturns ON while the gate 1 signal is OFF. The duration t11, from thetransition down of the gate 1 signal to the transition up of the gate 2signal, is determined by the condensor C11, and the resistor R12 and theduration of each pulse of the gate 2 signal is determined by thecondensor C12 and resistor R13.

Since the transistors 121, and 122, are turned ON and OFF sequentially,the time during which the power source 150 is not connected gap 140 isshortened, and, as shown in FIG. 16(E), the conventional zig-zagcharacteristic in the waveform of the gap current is drasticallyreduced. Subsequently, undesirable machining characteristics such asaccelerated electrode consumption, etc. is avoided.

Further, in the example of FIGS. 14 and 15, since there is no need for acoil between the power source 150 and the gap 140, the rise of thedischarge current in the gap 140 is steeper than in the prior art andthe integrated value of the discharge current is larger resulting inincreased machining speed. Further, in the example of FIGS. 14 and 15,even using a resistance between the power source and the gap, thedischarged current waveform is generally smooth, see FIGS. 16(E).

As will be apparent to the artisan on reading this disclosure, althoughin the example of FIG. 14 two transistors are used, each turned ON andOFF by a different gate signal, one may increase the number of such gatesignals and the number of the transistors. That is, one may use moreswitching elements. Further, one may use switching elements other thantransistors such as FETs, etc. It will also be appreciated that theabove switching elements can be controlled by a control device otherthan the controller 110 of FIG. 15.

The switching ON and OFF of current through the transistor 121, and theuse of a gate signal such as the gate 0 signal to control a transistoris similar to that of the conventional chopper circuit shown in FIG. 1.However, the use of the gate 1 signal to drive the switching transistorON and OFF and the one-shot multivibrator 115, which is triggered by theinvertor gate 1 signal to generate the gate 2 signal have no counterpartin the chopper circuits.

FIG. 17 is a schematic circuit diagram illustrating a variation of thecircuit of FIG. 5. In this variation, by using a gate signals g1 and g2,in the place of the gate signal used in FIG. 5, a power source V0 havingless current capacity than the power source V0 of FIG. 5 may be used.

The gate signal g1, is input to one of the input terminals of the ANDgate A1, while the gate signal g2, is input to the base of thetransistor TR0. Other than its use of the gate signals g1 and g2, thecircuit of FIG. 17 is similar to the circuit of FIG. 5.

FIGS. 18(A) through 18(D) comprise a timing chart illustrating theoperation of the circuit of FIG. 17. The gate signals g1 and g2 areillustrated in FIG. 18(A) and FIG. 18(B), respectively. FIG. 18(C) andFIG. 18(D) illustrate the gap voltage and the gap current, respectively,obtained during operation of the circuit of FIG. 17. Since with thecircuit of FIG. 17 a power source having greater current capacity can beused as the separate power source V0, the power source V0 is not limitedto those having low current capacity.

FIG. 19 is a schematic circuit diagram of another variation of thecircuit of FIG. 5. In FIG. 19, the emitters of the transistors TR0 andTR1 are connected. Therefore the gap current from power supply V0 (aswell as V1) flows through current detecting resistor R1. The operationof the circuit of FIG. 19 is similar to that of the circuit of FIG. 17except that in the circuit of FIG. 19, since gap current due to eitherV0 or V1 is detected, the ability of the circuit to stabilize the gapcurrent is improved. In other words, even though TR1 is the only switchcontrolled in the embodiment of FIG. 19, that switch is controlled inresponse to gap current from V0 during the time interval defined by gatesignal g2 as well as in the manner described above with regard to theembodiment of FIG. 17.

The foregoing description of a preferred embodiment of the invention hasbeen presented for purposes of illustration and description. It is notintended to be exhaustive or to limit the invention to the precise formdisclosed, and obviously many modifications and variations are possiblein light of the above teaching. These embodiments were chosen anddescribed in order to best explain the principles of the invention andits practical application to thereby enable others skilled in the art tobest utilize the invention in various embodiments and with variousmodifications as are suited to the particular use contemplated. It isintended that the scope of the invention be defined by the claimsappended hereto.

What is claimed is:
 1. A machining gap circuit for an electroerosionmachine having a machining gap (G, 50, 140) formed by a tool electrode(E) and a workpiece electrode (WP), a power source (V1, 60, 150) forsupplying machining energy to said machining gap and a means forinputting a gate signal (Gate 0) for controlling application of saidpower source to said gap, said gate signal comprising pulses indicativeof machining pulse ON time and machining pulse OFF time, said machininggap circuit further comprising:a switch (TR1, 140, 141) connected inseries with said machining gap for controlling the flow of currentthrough said gap; a machining current detector (R1, 41, R11) fordetecting the magnitude of said gap current: a comparator (C1, 31, 111)for comparing the magnitude of said detected current with a referencevalue (VR1, D/A out, VR); and a gate means (A1, 32, 113) responsive tosaid comparator means and to said gate signal for operating said switch,whereby said switch is closed when said machining current is below saidreference value and said gate signal is at a value indicative of amachining pulse ON time.
 2. The gap circuit according to claim 1 whereinsaid switch comprises an electronic switch having a control electrode.3. The gap circuit according to claim 1 wherein said machining currentdetector comprises a resistor connected in series with said gap and saidpower source.
 4. The gap circuit according to claim 1 wherein said gatemeans comprises a logic gate responsive to said gate signal and anoutput of said comparator.
 5. The gap power circuit according to claim 4wherein said logic gate comprises an AND gate.
 6. An electroerosionmachine comprising:a machining gap circuit comprising a power source, arectifying device and a switching device connected in series with amachining gap formed between an electrode and a workpiece, saidswitching device being operable to selectively close and open in orderto connect and disconnect said power source to said machining gap; acurrent detector for detecting the current flowing in said machining gapcircuit; a comparator for comparing the detected current with areference value and for generating an output indicative of saidcomparison; a means for generating a gate signal, said gate signalhaving levels defining a machining ON time and a machining OFF time; alogic device for driving said switching device, said logic device beingresponsive to said gate signal and said comparator output to open andclose said switching device whereby the current in said gap circuit iscontrolled to a generally constant value.
 7. A method of supplyingmachining energy to a machining gap of an electroerosion machine, saidmachining gap being formed by a tool electrode (E) and a workpieceelectrode (WP), said method comprising the steps of:(a) supplyingmachining energy to said machining gap from a power source; (b)controlling application of said power source to said gap by means of aswitch connected in series with said machining gap for controlling theflow of current to said gap, said switch being responsive to a gatesignal comprising pulses indicative of a machining pulse ON time and amachining pulse OFF time; (c) detecting the magnitude of the currentflow to the machining gap; (d) comparing the magnitude of the detectedcurrent with a reference value and outputting a comparison value; and(e) passing current to the machining gap only during a discharge byoperating said switch using said gate signal and said comparison value,whereby said switch is closed when said machining current is below saidreference value and said gate signal is at a value indicative of saidmachining pulse ON time whereby the current flow to the machining gap iscontrolled on a substantially instantaneous basis.
 8. The methodaccording to claim 7 wherein said switch comprises an electronic switchhaving a control electrode and said method further comprises the step ofgating said gate signal and said comparison value and using theresulting signal to operate said switch.
 9. The method according toclaim 8 wherein said logical operation comprises an AND operation. 10.The method according to claim 7 wherein the step of operating the switchfurther comprises the step of gating said gate signal and saidcomparison value in accordance with a logical operation.
 11. A method ofelectroerosion machining a workpiece in a substantially inductancelessmachining circuit comprising a power source and a machining gap formedbetween said workpiece and a machining electrode, said method comprisingthe steps of:(a) applying a voltage from said power source across saidmachining gap to induce electric discharges in said gap whereby currentflows through said gap; (b) detecting the magnitude of the current flowthrough said gap; (c) comparing the magnitude of said current with areference level and generating a comparison output signal; and (d)controlling the flow of said current to said gap on a substantiallyinstantaneous basis during said discharge using said comparison outputsignal to maintain the magnitude of said current at a generally constantvalue.
 12. The method according to claim 11 wherein said machiningcircuit further comprises a switch connected between said power sourceand said machining gap and wherein the step of applying comprises usinga gate signal having a machining ON time and a machining OFF timewherein said voltage is only applied across said machining gap duringsaid ON time and said step of controlling further comprises using saidswitch to control the flow of current to said gap during said ON time.13. The method according to claim 12 wherein said comparison outputsignal comprises a series of pulses generated during said electricdischarges and said step of controlling further comprises controllingthe state of said switch using said series of pulses during said ONtime.
 14. The method according to claim 11 further comprising the stepof generating a train of pulses having an ON time and an OFF timewherein the voltage from said power source is applied across said gapduring the ON time and further comprising the step of interrupting thecurrent flow at the beginning of the OFF time.
 15. The method accordingto claim 14 wherein the step of controlling comprises intermittentlyinterrupting the flow of current through said gap during said ON time inresponse to said comparison output signal.
 16. A method of supplyingmachining energy to a machining gap of an electroerosion machine havinga substantially inductanceless machining circuit, said machining gapbeing formed by a tool electrode (E) and a workpiece electrode (WP),said method comprising the steps of:(a) supplying machining energy tosaid machining gap from a power source; (b) controlling application ofsaid power source to said gap by means of a switch connected in serieswith said machining gap for controlling the flow of current to said gap,said switch being responsive to a gate signal comprising pulsesindicative of a machining pulse ON time and a machining pulse OFF time;(c) detecting the magnitude of the current flow to the machining gap;(d) comparing the magnitude of the detected current with a referencevalue and outputting a comparison value; and (e) operating said switchusing said gate signal and said comparison value, whereby said switch isclosed when said machining current is below said reference value andsaid gate signal is at a value indicative of said machining pulse ONtime whereby the current flow to the machining gap is controlled on asubstantially instantaneous basis.
 17. A method of electroerosionmachining a workpiece in a machining circuit comprising a power sourceand a machining gap formed between said workpiece and a machiningelectrode, said method comprising the steps of:(a) applying a voltagefrom said power source across said machining gap to induce electricdischarges in said gap whereby current flows through said gap; (b)detecting the magnitude of the current flow through said gap; (c)comparing the magnitude of said current with a reference level andgenerating a comparison output signal; and (d) passing current to themachining gap only during a discharge by controlling the flow of saidcurrent to said gap on a substantially instantaneous basis during saiddischarge using said comparison output signal to maintain the magnitudeof said current at a generally constant value.